epyc 7252 firmware · threatengine.sh

Home/Product/amd epyc 7252 firmware

Product

amd epyc 7252 firmware

73 known vulnerabilities across versions

Vulnerabilities are listed by affected version. Select any CVE for the full briefing and its intelligence graph.

Sort Min CVSS Published since

< romepi_1.0.0.g

A TOCTOU (Time-Of-Check-Time-Of-Use) in SMM may allow an attacker with ring0 privileges and access to the BIOS menu or UEFI shell

< romepi_1.0.0.c

An out of bounds memory write when processing the AMD PSP1 Configuration Block (APCB) could allow an attacker with access the abil

Improper or unexpected behavior of the INVD instruction in some AMD CPUs may allow an attacker with a malicious hypervisor to affe

< romepi_1.0.0.d

Insufficient DRAM address validation in System Management Unit (SMU) may allow an attacker to read/write from/to an invalid DRAM a

< romepi_1.0.0.d

Insufficient input validation in the ASP Bootloader may enable a privileged attacker with physical access to expose the contents o

< romepi_1.0.0.d

TOCTOU in the ASP Bootloader may allow an attacker with physical access to tamper with SPI ROM records after memory content verifi

< romepi_1.0.0.g

Insufficient DRAM address validation in System Management Unit (SMU) may allow an attacker to read/write from/to an invalid DRAM a

< romepi_1.0.0.f

Failure to validate the value in APCB may allow a privileged attacker to tamper with the APCB token to force an out-of-bounds memo

An issue in “Zen 2” CPUs, under specific microarchitectural circumstances, may allow an attacker to potentially access sensiti

A potential power side-channel vulnerability in some AMD processors may allow an authenticated attacker to use the power reporting

Insufficient validation of inputs in SVC_MAP_USER_STACK in the ASP (AMD Secure Processor) bootloader may allow an attacker with a

An attacker with a compromised ASP could possibly send malformed commands to an ASP on another CPU, resulting in an out of bounds

Improper access control settings in ASP Bootloader may allow an attacker to corrupt the return address causing a stack-based buffe

Improper input validation in ABL may enable an attacker with physical access, to perform arbitrary memory overwrites, potentially

Insufficient syscall input validation in the ASP Bootloader may allow a privileged attacker to execute arbitrary DMA copies, which

Improper validation of DRAM addresses in SMU may allow an attacker to overwrite sensitive memory locations within the ASP potentia

Insufficient input validation in the SMU may enable a privileged attacker to write beyond the intended bounds of a shared memory b

Insufficient input validation in the SMU may allow an attacker to corrupt SMU SRAM potentially leading to a loss of integrity or d

Insufficient validation in parsing Owner's Certificate Authority (OCA) certificates in SEV (AMD Secure Encrypted Virtualization) a

< romepi_1.0.0.e

Insufficient input validation of mailbox data in the SMU may allow an attacker to coerce the SMU to corrupt SMRAM, potentially lea

< romepi_1.0.0.d

A compromised or malicious ABL or UApp could send a SHA256 system call to the bootloader, which may result in exposure of ASP memo

< romepi_1.0.0.d

A TOCTOU in ASP bootloader may allow an attacker to tamper with the SPI ROM following data read to memory potentially resulting in

< romepi_1.0.0.d

Insufficient bounds checking in ASP may allow an attacker to issue a system call from a compromised ABL which may cause arbitrary

When SMT is enabled, certain AMD processors may speculatively execute instructions using a target from the sibling thread after an

< romepi_1.0.0.c

Insufficient input validation in the SMU may allow an attacker to improperly lock resources, potentially resulting in a denial of

< romepi_1.0.0.c

Insufficient bound checks in the SMU may allow an attacker to update the SRAM from/to address space to an invalid value potentiall

< romepi_1.0.0.c

Insufficient bound checks in the SMU may allow an attacker to update the from/to address space to an invalid value potentially res

< romepi_1.0.0.c

Insufficient input validation in the SMU may allow a physical attacker to exfiltrate SMU memory contents over the I2C bus potentia

< romepi_1.0.0.c

Improper syscall input validation in the ASP Bootloader may allow a privileged attacker to read memory out-of-bounds, potentially

Insufficient syscall input validation in the ASP Bootloader may allow a privileged attacker to read memory outside the bounds of a

< romepi_1.0.0.c

TOCTOU in the ASP may allow a physical attacker to write beyond the buffer bounds, potentially leading to a loss of integrity or d

< romepi_1.0.0.9

Insufficient checks in SEV may lead to a malicious hypervisor disclosing the launch secret potentially resulting in compromise of

< romepi_1.0.0.c

Insufficient bounds checking in ASP (AMD Secure Processor) firmware while handling BIOS mailbox commands, may allow an attacker to

< romepi_1.0.0.c

Insufficient input validation in SYS_KEY_DERIVE system call in a compromised user application or ABL may allow an attacker to corr

< romepi_1.0.0.d

Failure to validate the communication buffer and communication service in the BIOS may allow an attacker to tamper with the buffer

IBPB may not prevent return branch predictions from being specified by pre-IBPB branch targets leading to a potential information

Execution unit scheduler contention may lead to a side channel vulnerability found on AMD CPU microarchitectures codenamed “Zen

Aliases in the branch predictor may cause some AMD processors to predict the wrong branch type potentially leading to information

Mis-trained branch predictions for return instructions may allow arbitrary speculative code execution under certain microarchitect

A potential vulnerability in some AMD processors using frequency scaling may allow an authenticated attacker to execute a timing a

An attacker with access to a malicious hypervisor may be able to infer data values used in a SEV guest on AMD CPUs by monitoring c

< romepi-sp3_1.0.0.d

Improper validation of the BIOS directory may allow for searches to read beyond the directory table copy in RAM, exposing out of b

< romepi-sp3_1.0.0.d

Insufficient bound checks in the System Management Unit (SMU) may result in access to an invalid address space that could result i

< romepi-sp3_1.0.0.d

Insufficient checks in System Management Unit (SMU) FeatureConfig may result in reenabling features potentially resulting in denia

< romepi-sp3_1.0.0.d

Insufficient General Purpose IO (GPIO) bounds check in System Management Unit (SMU) may result in access/updates from/to invalid a

< romepi-sp3_1.0.0.d

Insufficient bound checks in the System Management Unit (SMU) may result in a system voltage malfunction that could result in deni

< romepi-sp3_1.0.0.d

Insufficient bound checks related to PCIE in the System Management Unit (SMU) may result in access to an invalid address space tha

< romepi-sp3_1.0.0.d

Insufficient bounds checking in an SMU mailbox register could allow an attacker to potentially read outside of the SRAM address ra

< romepi-sp3_1.0.0.d

A TOCTOU race condition in SMU may allow for the caller to obtain and manipulate the address of a message port register which may

< romepi-sp3_1.0.0.d

Failure to validate the integer operand in ASP (AMD Secure Processor) bootloader may allow an attacker to introduce an integer ove

< romepi-sp3_1.0.0.c

Insufficient validation of elliptic curve points in SEV-legacy firmware may compromise SEV-legacy guest migration potentially resu

< romepi-sp3_1.0.0.c

Improper validation of destination address in SVC_LOAD_FW_IMAGE_BY_INSTANCE and SVC_LOAD_BINARY_BY_ATTRIB in a malicious UApp or A

LFENCE/JMP (mitigation V2-2) may not sufficiently mitigate CVE-2017-5715 on some AMD CPUs.

Some AMD CPUs may transiently execute beyond unconditional direct branches, which may potentially result in data leakage.

AMD EPYC™ Processors contain an information disclosure vulnerability in the Secure Encrypted Virtualization with Encrypted State

A malicious hypervisor in conjunction with an unprivileged attacker process inside an SEV/SEV-ES guest VM may fail to flush the Tr

< romepi-sp3_1.0.0.c

Insufficient DRAM address validation in System Management Unit (SMU) may result in a DMA read from invalid DRAM address to SRAM re

< romepi-sp3_1.0.0.c

Insufficient bounds checking in System Management Unit (SMU) may cause invalid memory accesses/updates that could result in SMU ha

< romepi-sp3_1.0.0.c

Improper input and range checking in the AMD Secure Processor (ASP) boot loader image header may allow an attacker to use attacker

< romepi-sp3_1.0.0.c

AMD System Management Unit (SMU) contains a potential issue where a malicious user may be able to manipulate mailbox entries leadi

< romepi-sp3_1.0.0.c

AMD System Management Unit (SMU) may experience a heap-based overflow which may result in a loss of resources.

< romepi-sp3_1.0.0.c

Insufficient ID command validation in the SEV Firmware may allow a local authenticated attacker to perform a denial of service of

< romepi-sp3_1.0.0.c

Insufficient validation of the AMD SEV Signing Key (ASK) in the SEND_START command in the SEV Firmware may allow a local authentic

< romepi-sp3_1.0.0.c

A potential vulnerability exists in AMD Platform Security Processor (PSP) that may allow an attacker to zero any privileged regist

< romepi-sp3_1.0.0.c

A side effect of an integrated chipset option may be able to be used by an attacker to bypass SPI ROM protections, allowing unauth

< romepi-sp3_1.0.0.c

Race condition in ASP firmware could allow less privileged x86 code to perform ASP SMM (System Management Mode) operations.

< romepi-sp3_1.0.0.c

Insufficient input validation in ASP firmware for discrete TPM commands could allow a potential loss of integrity and denial of se

< romepi-sp3_1.0.0.c

Insufficient validation of BIOS image length by ASP Firmware could lead to arbitrary code execution.

< romepi-sp3_1.0.0.c

Improper access controls in System Management Unit (SMU) may allow for an attacker to override performance control tables located

< romepi-sp3_1.0.0.c

AMD System Management Unit (SMU) may experience an integer overflow when an invalid length is provided which may result in a poten

< romepi-sp3_1.0.0.c

Persistent platform private key may not be protected with a random IV leading to a potential “two time pad attack”.

< romepi-sp3_1.0.0.c

Failure to flush the Translation Lookaside Buffer (TLB) of the I/O memory management unit (IOMMU) may lead an IO device to write t

< romepi-sp3_1.0.0.c

A potential denial of service (DoS) vulnerability exists in the integrated chipset that may allow a malicious attacker to hang the

Vulnerabilities
CISA KEV catalog
CWE weaknesses
CAPEC attack patterns
Package vulnerabilities

Threat intelligence
Threat actors
Tools & malware
ATT&CK techniques
IOCs

Detection & defense
Sigma rules
YARA rules
Atomic Red Team tests
D3FEND countermeasures

Compliance
NIST 800-53
ISO 27001:2022
SOC 2 TSC
PCI-DSS v4.0
CIS Controls v8.1

About
All capabilities
Live statistics
Data sources
Privacy policy
Terms of service

threatengine.sh · Open-source threat intelligence platform · 100+ authoritative sources · Every fact traces to its origin