CVE-2020-12954
A side effect of an integrated chipset option may be able to be used by an attacker to bypass SPI ROM protections, allow
A side effect of an integrated chipset option may be able to be used by an attacker to bypass SPI ROM protections, allowing unauthorized SPI ROM modification.
MEDIUM · CVSS 5.5
EPSS 0.0006
Monitor
- No active-exploitation, high-EPSS, or public-exploit signals - routine patching cadence
Sigma rules0
YARA rules0