Non-transparent sharing of return predictor targets between contexts in some Intel(R) Processors may allow an authorized user to p

Improper conditions check in multiple Intel® Processors may allow an authenticated user to potentially enable partial escalation

Insufficient memory protection in System Management Mode (SMM) and Intel(R) TXT for certain Intel(R) Xeon(R) Processors may allow

Improper invalidation for page table updates by a virtual guest operating system for multiple Intel(R) Processors may allow an aut

Insufficient input validation in system firmware for Intel(R) Xeon(R) Scalable Processors, Intel(R) Xeon(R) Processors D Family, I

Insufficient access control in system firmware for Intel(R) Xeon(R) Scalable Processors, 2nd Generation Intel(R) Xeon(R) Scalable