Home/CVE/Improper handling of error condition during host-induced faults can allow a local high-privileged attack to selectively
CVE

CVE-2025-0029

Improper handling of error condition during host-induced faults can allow a local high-privileged attack to selectively

Improper handling of error condition during host-induced faults can allow a local high-privileged attack to selectively drop guest DMA writes, potentially resulting in a loss of SEV-SNP guest memory integrity.

EPSS 0.0002
Monitor
  • No active-exploitation, high-EPSS, or public-exploit signals - routine patching cadence
Sigma rules0 YARA rules0
⬡

Weakness Classification

CWE-390Detection of Error Condition Without Action
▣

Scoring & Timeline

Published to NVD10 Feb 2026 · 08:16 PM
SSVC triage · cisa-vulnrichment
Exploitation
none
Automatable
no
Technical impact
partial
SSVC asks the questions that actually drive patch urgency: is it being exploited, can attacks be automated, and how total is the impact.
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References & Sources

1
Source URLs (vendor pages, mailing lists, write-ups). Exploit/PoC links are in their own section above to avoid duplication.
https://www.amd.com/en/resources/product-security/bulletin/AMD-SB-3023.html
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