Home/CVE/Sequence of processor instructions leads to unexpected behavior in the Intel(R) DSA V1.0 for some Intel(R) Xeon(R) Proce
CVE

CVE-2024-37020

Sequence of processor instructions leads to unexpected behavior in the Intel(R) DSA V1.0 for some Intel(R) Xeon(R) Proce

Sequence of processor instructions leads to unexpected behavior in the Intel(R) DSA V1.0 for some Intel(R) Xeon(R) Processors may allow an authenticated user to potentially enable denial of service via local access.

LOW · CVSS 3.8 EPSS 0.00011
Monitor
  • No active-exploitation, high-EPSS, or public-exploit signals - routine patching cadence
Sigma rules0 YARA rules0
⬡

Weakness Classification

CWE-1281Sequence of Processor Instructions Leads to Unexpected Behavior
▣

Scoring & Timeline

3.8
LOW · CVSS v3.1 · secure@intel.com
View on NVD
Attack Vector
Network Adjacent Local Physical
Attack Complexity
Low High
Privileges Required
None Low High
User Interaction
None Required
Scope
Unchanged Changed
Confidentiality
None Low High
Integrity
None Low High
Availability
None Low High
Published to NVD12 Feb 2025 · 10:15 PM
CVSS VectorCVSS:3.1/AV:L/AC:L/PR:L/UI:N/S:C/C:N/I:N/A:L
SSVC triage · cisa-vulnrichment
Exploitation
none
Automatable
no
Technical impact
partial
SSVC asks the questions that actually drive patch urgency: is it being exploited, can attacks be automated, and how total is the impact.
⚑

Vendor Advisories

6
suse-csafSUSE-SU-2025:20286-1
suse-csafSUSE-SU-2025:1032-1
suse-csafSUSE-SU-2025:20158-1
suse-csafSUSE-SU-2025:0591-1
suse-csafSUSE-SU-2025:0569-1
🔗

References & Sources

2
Source URLs (vendor pages, mailing lists, write-ups). Exploit/PoC links are in their own section above to avoid duplication.
https://intel.com/content/www/us/en/security-center/advisory/intel-sa-01194.html
https://lists.debian.org/debian-lts-announce/2025/03/msg00021.html
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