Home/CVE/Sequence of processor instructions leads to unexpected behavior in Intel(R) Core(TM) Ultra Processors may allow an authe
CVE

CVE-2023-46103

Sequence of processor instructions leads to unexpected behavior in Intel(R) Core(TM) Ultra Processors may allow an authe

Sequence of processor instructions leads to unexpected behavior in Intel(R) Core(TM) Ultra Processors may allow an authenticated user to potentially enable denial of service via local access.

MEDIUM · CVSS 4.7 EPSS 0.00011
Monitor
  • No active-exploitation, high-EPSS, or public-exploit signals - routine patching cadence
Sigma rules0 YARA rules0
⬡

Weakness Classification

CWE-1281Sequence of Processor Instructions Leads to Unexpected Behavior
▣

Scoring & Timeline

4.7
MEDIUM · CVSS v3.1 · secure@intel.com
View on NVD
Attack Vector
Network Adjacent Local Physical
Attack Complexity
Low High
Privileges Required
None Low High
User Interaction
None Required
Scope
Unchanged Changed
Confidentiality
None Low High
Integrity
None Low High
Availability
None Low High
Published to NVD16 May 2024 · 09:15 PM
CVSS VectorCVSS:3.1/AV:L/AC:H/PR:L/UI:N/S:U/C:N/I:N/A:H
SSVC triage · cisa-vulnrichment
Exploitation
none
Automatable
no
Technical impact
partial
SSVC asks the questions that actually drive patch urgency: is it being exploited, can attacks be automated, and how total is the impact.
⚑

Vendor Advisories

8
suse-csafSUSE-SU-2025:1032-1
suse-csafSUSE-SU-2025:20020-1
suse-csafopenSUSE-SU-2024:13974-1
usnUSN-6797-1
suse-csafSUSE-SU-2024:1771-1
🔗

References & Sources

1
Source URLs (vendor pages, mailing lists, write-ups). Exploit/PoC links are in their own section above to avoid duplication.
https://www.intel.com/content/www/us/en/security-center/advisory/intel-sa-01052.html
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