Home/CAPEC/Design for FPGA Maliciously Altered
Attack Pattern

Design for FPGA Maliciously Altered

CAPEC-674 · Detailed · Stable
An adversary alters the functionality of a field-programmable gate array (FPGA) by causing an FPGA configuration memory chip reload in order to introduce a malicious function that could result in the FPGA performing or enabling malicious functions on a host system. Prior to the memory chip reload, the adversary alters the program for the FPGA by adding a function to impact system operation.
likelihood: Low severity: High
External lookups - second-class, for what we don’t hold ourselves
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